Signs - VHDL Hardware Developement / News: Recent posts

In an effort to make Signs developement more transparent and in the hope to attract outside developers, the Signs source code has been uploaded to the subversion repository provided by SourceForge. From this point on, developement will take place there.

After months of bug-fixing and regression-testing a new signs release is available:

Signs 0.6.3
http://www.iti.uni-stuttgart.de/~bartscgr/signs/download

While the release focus is clearly on bugfixes, there are some feature improvements as well such as enhanced test bench support and improved netlist and simulator views. The VHDL compiler has support for subprograms now and elaboration of big designs is much faster because of improved context handling.... read more