Issue resetting a blank then programmed part into run mode
v0.8 Release?
Error in gd32vw553.conf: "flash 0x08000000 0x083FFFFF" May be deleted / commented debug output in 'parsers/devconfig.c' line 38 "printf("read '%s'\n", filename);"
Add reading of MCU parameters from the config file
Add reading of MCU parameters from the config file
The disassembler says that address 0x0bf90000 jumps to 0x0bf99231—into the OTP. So, the OTP is also included in system memory
Sorry, I posted the patch first and only saw the lastest version. "Some values differ from yours.": ram_start: I don't see much of a difference, your value is a little better ram_end: memory is divided into blocks (refman, 2.3.3, Embedded SRAMs). There may be spaces between them. It's probably safer to use only SRAM1. So for 535/545/575/585 -> 0x2000 0000 + 192k = 0x2003 0000. For 59x/5Ax/5Fx/5Gx -> 0x2000 0000 + 768k = 0x200C 0000. Anyway, as far as I understand, these addresses are only used for...
Is it possible to get a binary for windows?
Sure. (Sorry, I didn't see the Anonymous post before now.) Binary for 64-bit Windows, not tested.
linting etc fixes merge request
If you look at the latest git version you can see that I already put in placeholders for these chips, with some values filled in. It even has a complete and active (but not verified) entry for the 585xx chips. Some values differ from yours. So we should try to find out which values are best.
Thank so much! Can you please also tell where you have the information from (datasheet revision, other document references) so that it can be double-checked? The option bytes and sectors can be tricky for some systems but it helps to know what your assumptions are based on.
Add STM32u5 record into dev_tree
Flashing of Intel hex with skipped (0xFF) memory block failed. No write after block happens
Regression: required delay before entering boot loader mode
I would test it with the following line, if someone provide a binary to me: /* {0x489, "STM32U073xx/83xx" , 0x20002170, 0x2000A000, 0x08000000, 0x08040000, 1, p_2k, 0x1FFF7800, 0x1FFF7860, 0x1FFF0000, 0x1FFF6800, 0}, */ Here the reference documents AN2606 rev 66 SRAM Table 209 STM32U073xx/83xx System-mem-addr Table 192 26 Kbytes, starting from address 1FFF0000, STM32U0 – FLASH Memory Flash presentation Flash-Address: Main Memory Page 7 PSize: Page 7 Option Byte: Page Option Bytes are used to early...
Thanks! Here is binary with your patch.
Thanks! Here is binary with your patch. (The attachment ended up in the original post.)
Thanks! Here is binary with your patch. (The attachment ended up in the original post.)
STM32U0 Support - Unknown/unsupported device (Device ID: 0x489)
Thanks! Here is binary with you patch.
I would test it with the following line, if someone provide a binary to me: /* {0x489, "STM32U073xx/83xx" , 0x20002170, 0x2000A000, 0x08000000, 0x08040000, 1, p_2k, 0x1FFF7800, 0x1FFF7860, 0x1FFF0000, 0x1FFF6800, 0}, */ Here the reference documents https://www.st.com/content/ccc/resource/technical/document/application_note/b9/9b/16/3a/12/1e/40/0c/CD00167594.pdf/files/CD00167594.pdf/jcr:content/translations/en.CD00167594.pdf SRAM Table 209 STM32U073xx/83xx System-mem-addr Table 192 26 Kbytes, starting...
It is possible that it just needs the right parameters in dev_table.c and it will work. I have added placeholders for this device (and all other devices in latest AN2606) in dev_table.c, in hope that people will contribute the missing pieces, after looking up the individual data sheets and testing on their devices.
dev_table: Add placeholders for all devices in AN2606 rev 66
stm32: Remove duplicate version field
STM32U0 Support - Unknown/unsupported device (Device ID: 0x489)
Unable to do flash write with page erase for STM32G07xx on I2C
BUG: CRC calculation doesn't work over UART
Please see ST's AN2606 document for the details of your chip. And generally, make sure all other UART or SPI lines are quiet.
Is there something I need to configure on the STM32 side to properly support the stm32flash utility? So far I've not gotten into the STM32 side of things, as another engineer is working on that SW.
It doesn't matter if I use "echo 1 | tee" or "echo 1". I put my multimeter on BOOT0 & MCU_RSTn pins and added an exit from one stage to another. Both pins are set correctly throughout the script.
It doesn't matter if I use "echo 1 | tee" or "echo 1". I put my multimeter on BOOT0 & MCU_RSTn pins and added an exit from one stage to another. Both pins are set correctly throughout the script. On Thu, Jan 2, 2025 at 5:04 PM Tormod Volden tormod@users.sourceforge.net wrote: Are you sure echo 1 > file isn't interpreted as echo with stdout (file handle 1) redirected? I usually use echo 1 | tee file which avoids any ambiguity (and also because I can use sudo tee easily). [tickets:#170] https://sourceforge.net/p/stm32flash/tickets/170/...
Is there something I need to configure on the STM32 side to properly support the stm32flash utility? So far I've not gotten into the STM32 side of things, as another engineer is working on that SW. On Fri, Jan 3, 2025 at 4:34 PM Patricia Holden pholden@nklabs.com wrote: It doesn't matter if I use "echo 1 | tee" or "echo 1". I put my multimeter on BOOT0 & MCU_RSTn pins and added an exit from one stage to another. Both pins are set correctly throughout the script. On Thu, Jan 2, 2025 at 5:04 PM Tormod...
Please don't post images of text, just copy and paste the text. Can't you just flash the part at 0x08000000 with one stm32flash invocation and the part at 0x08100000 with another?
Flashing STM32F446 fails at 30%
Are you sure echo 1 > file isn't interpreted as echo with stdout (file handle 1) redirected? I usually use echo 1 | tee file which avoids any ambiguity (and also because I can use sudo tee easily).
Just one tip: If you want to set up the serial port using stty and keep stm32flash from reconfiguring the port, use -b 0.
Unable to program Nucleo-g070rb using stm32flash utility
I was wondering if anyone has used the nucleo-g070rb with stm32flash. I'm getting the error: stm32flash 0.7 http://stm32flash.sourceforge.net/ Using Parser : Raw BINARY Size : 91512 Interface serial_posix: 115200 8E1 Failed to init device, timeout. My HW is set up with an AM623 SOC that controls BOOT0 and RSTn on the STM32. We are using a ttyS0, which is configured properly according to dmesg to do the programming. The following is my script for running the programming: // Set ttyS0 to 8bit, even...
Add pre-commit configuration/flow and some fixes
Add support for STM32U5Axxx
ohhh that worked! Thank you so much! Sorry for bothering your with my incompetence...
Or .hex file.
It seems that you are programming an .elf file directly onto the device. You should extract a binary file from the ELF file and use that instead.
Using the STM provided programmer tool works fine.
Flashing STM32F446 fails at 30%
Address Problems on STM32H742xG/743xG devices
Failed to init device using "-i '-dtr&rts,dtr:-dtr&-rts,dtr'" param
Thanks for your help. I have searched some materials and solved the problem.
No, I don't think you understand this at all :) These are serial port control lines, for instance on a USB-serial adapter you may find DTR and RTS in addition to the mandatory TX and RX lines. In this context they can be used like GPIOs on the host. For controlling the STM32 boot mode from the host, these lines (or GPIOs) can be hooked up to Reset and BOOT0 on the STM32. If you are setting BOOT0 (and BOOT1) manually, and also reset the STM32 manually, you don't need to think about any "init sequence"....
Thanks for your reply. I didn't find DTR and RTS pins on the board, but in a blog I found that DTR controls "Reset" and RTS controls "BOOT0". I wonder if I understand them correctly.
What are DTR and RTS connected to?
Failed to init device using "-i '-dtr&rts,dtr:-dtr&-rts,dtr'" param
dev_table.c: Add STM32C011xx (Device ID 0x443)
Pushed. (I fixed up the option byte end address, and whitespace.)
dev_table: Add STM32C011xx (Device ID 0x443)
RM0490 rev 3 https://www.st.com/resource/en/reference_manual/rm0490-stm32c0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf Most of the information was found in Section 2 and 3
RM0490 rev 3 https://www.st.com/resource/en/reference_manual/rm0490-stm32c0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf Most of the information was found in Section 2 and 3
Thanks! Do you have a document reference? It is good to have because sometimes ST's documents are not consistent or they change.
dev_table.c: Add STM32C011xx (Device ID 0x443)
Great that you could connect. You must not flash an ".elf" file, but a raw binary file. You can use the -v option to verify the flashing at the same time. You can also use -r to read back from flash afterwards (while still in the bootloader, before resetting), and compare with the original file.
Hi, Thanks for the response. Now iam able to connect with the device. When iam trying to flash the device iam getting the following result. stm32flash /dev/ttyS1 -w /lib/firmware/mcu_fw/test1_l010rb.elf -b 115200 stm32flash 0.7 http://stm32flash.sourceforge.net/ Using Parser : Raw BINARY Size : 668104 Interface serial_posix: 115200 8E1 Version : 0x31 Option 1 : 0x00 Option 2 : 0x00 Device ID : 0x0447 (STM32L01xxx/02xxx) RAM : Up to 2KiB (0b reserved by bootloader) Flash : Up to 16KiB (size first...
"Failed to init device" can be because it is not in bootloader mode, or it has detected some activity on another bootloader channel than the serial port that you are connecting with.
Unable to flash STM32L010C6 Using stm32flash
Unable to flash STM32L010C6 Using stm32flash
dev_table: Fix up option byte range for device 0x497
dev_table: Fix typo in flash start for device 0x483
I have just added some RPi info to the Hints section in the wiki, based on another report. Since it mentions dtoverlay=miniuart-bt I think it allows using BT (but no serial console). Please let me know how that works, or if the wiki entry can be improved.
FWIW, I have added RPi-specific information about this to the Hints section in the wiki, with a contributed pinctrl example.
STM32F103 Blue Pill with Raspberry Pi 3 Model B
Thanks a lot for reporting back with the solution. I have added it to the Hints section in the wiki.
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Hints
Managed to Resolve it For future people having pains, the best config seems to be: dtoverlay=miniuart-bt enable_uart=1 and remove the segment from cmdline.txt: console=serial0,115200 used ttyAMA0 I haven't tried using the gpio control flags as it seems it was depricated from the kernal, written my own using pinctrl for testing. gpio7 is boot0 gpio27 is reset pinctrl 17 op dh pinctrl 27 op dl sleep 0.1 pinctrl 27 op dh sleep 0.2 sudo stm32flash -b 115200 /dev/ttyAMA0 -v -w generic_boot20_pc13.bin...
Managed to Resolve it For future people having pains, the best config seems to be: dtoverlay=miniuart-bt enable_uart=1 and remove the segment from cmdline.txt: console=serial0,115200 used ttyAMA0 I haven't tried using the gpio control flags as it seems it was depricated from the kernal, written my own using pinctrl for testing. pinctrl 17 op dh pinctrl 27 op dl sleep 0.1 pinctrl 27 op dh sleep 0.2 sudo stm32flash -b 115200 /dev/ttyAMA0 -v -w generic_boot20_pc13.bin sleep 0.5 pinctrl 17 op dl pinctrl...
Managed to Resolve it For future people having pains, the best config seems to be: dtoverlay=miniuart-bt enable_uart=1 and remove the segment from cmdline.txt: console=serial0,115200 used ttyAMA0 I haven't tried using the gpio control flags as it seems it was depricated from the kernal, written my own using pinctrl for testing. ~~~ shell script pinctrl 17 op dh pinctrl 27 op dl sleep 0.1 pinctrl 27 op dh sleep 0.2 sudo stm32flash -b 115200 /dev/ttyAMA0 -v -w generic_boot20_pc13.bin sleep 0.5 pinctrl...
There is an example in the commit 48231f15 message: stty -F /dev/ttyUSB0 raw parenb -parodd -cstopb cs8 115200 time 5 min 0 \ line 0 -brkint -icrnl -imaxbel -opost -onlcr -isig -icanon -iexten \ -echo -echok -echoctl -echoke stm32flash -b 0 /dev/ttyUSB0
Disregard that last comment, I read "same thing" but and didn't notice "without".
to my understanding I am not using mini-UART. I disabled the bluetooth etc. not familier with stty, will have to have a poke.
Oh no, that is reproducing it! to clarify I only get 'Failed to set terminal flags' on existing ports.
if I use rubbish, e.g. /dev/eoviergmio I get the same thing without 'Failed to set terminal flags' That is weird, but I cannot reproduce it: $ ./stm32flash /dev/eoviergmio stm32flash 0.7 http://stm32flash.sourceforge.net/ Error probing interface "serial_posix" Cannot handle device "/dev/eoviergmio" Failed to open port: /dev/eoviergmio
There is one commit in git that helped for an issue on Raspberry 3 but I am not sure it is the same issue. Worth trying out latest git maybe. https://sourceforge.net/p/stm32flash/tickets/146/
Are you using the troublesome mini-UART or the other? https://www.raspberrypi.com/documentation/computers/configuration.html#mini-uart-and-cpu-core-frequency Anyway, a workaround could be to configure the port using stty and then run stm32flash with -b 0.
I've just inserted a USB-Serial, and /dev/ttyUSB0 does work when it's inserted - but we really need to use the internal serial.
a full prompt example with all details: pi@test-kit:~ $ sudo stm32flash -v -w blink.bin -b 9600 /dev/serial0 stm32flash 0.7 http://stm32flash.sourceforge.net/ Using Parser : Raw BINARY Size : 146013 Failed to set terminal flags Error probing interface "serial_posix" Cannot handle device "/dev/serial0" Failed to open port: /dev/serial0
STM32F103 Blue Pill with Raspberry Pi 3 Model B
Hi, Thanks for your answer. According to AN2606 almost every STM32 micro needs a minimum delay, so with the current code, whenever the -i option is used to specify a GPIO sequence, an additional delay will always need to be added at the end of the sequence. To make things worse, leaving this delay out does not automatically cause communication failures: in our tests, we only see communication errors on 10-20% of the cases. That's bad becasue if you don't pay attention to this issue (which users may...
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Regression: required delay before entering boot loader mode
Thanks for your report. The change should have been mentioned in the ChangeLog and release notes. I have added info to the wiki Hints and online ChangeLog pages. I'll keep this bug open to remember to also mention it retroactively in the next release announcement. I think both changes were intentional but not mentioned. The current behaviour seems consistent with the documentation, and the previous 600 ms pause was not documented anywhere AFAICS.
ChangeLog
Hints
Regression: required delay before entering boot loader mode
GPIO sysfs is still available in current kernels, even though it is deprecated. The default RPi kernel may have disabled it but that does not mean it has gone away.
Thanks for the info! Debian and Ubuntu 24.04 (LTS) uses libgpiod v1.6 so this merge request can still be useful, but at least the autoconf detection would need to check for 1.x.
This merge request works with libgpiod v1.x, that is already obsoleted. The new libgpiod v2.x is not backward compatible and the build will fails on systems with the new version of the library.
We have a merge request for using libgpiod in https://sourceforge.net/p/stm32flash/code/merge-requests/13/
/sys/class/gpio gone away in linux kernel 6.6
stm32f401ccu6 stitches through the garbage
thank you very much!