#45 Hyperlynx import bug

[Jim Meech]

Hello Marmni,
A minor bug report:
When importing a board in from a hyperlynx file, the import hangs in a seemingly endless loop.
tracks & polgons are generated, but not pads & vias. Error messages are generated.
it is possible to save the board as a freecad file.
I have attached a test case with all files recreate the problem & log of report view.
This occurs on all recent versions of freecad PCB running on Ubuntu 14.04 64bit / Freecad 15

Many thanks for your very useful software.
Best regards
jim

[Mariusz]

Hi,
fixed. You can download nevest version from github.

[Jim Meech]

Hi Marmni,
Thanks for fixing this bug, all tha pads and holes are drawn now, There is still a problem when assembling with parts. Not all the parts in the hyperlynx file make it onto the board, they are not listed as missing parts. The semi conductors & conectors get added, but not the resistors & capacitors. Is this behavior intentional? or is it a bug?

[Mariusz]

Hi,
bug (now old bug ;) ). Download nevest version from github.

[Jim Meech]

Hi,
Thanks, I will download & give a try strait away.
Many thanks & best regards
Jim

[Jim Meech]

Hi Marmni,
Thanks for the updated version on github. I have run my test board and the componants all come in fine now. I have spotted an additional problem:
The top track layer is reproduced on the bottom layer. The bottom track layer is not drawn. See attached pictures and test file.
I have also noticed that the name and value for parts are no longer drawn with the thickness specified in the layers import dialogue. This results in the text under the tracks. This also happens on the standard board import, but is less noticable as there are no polygons.

Many thanks & best regards
Jim

[Mariusz]

Hi,
about missing bottom layer. This is not a bug in script. In your file there is no def of the bottom layer. Find in file

{STACKUP
(SIGNAL T=0.00070 P=0.00070 L=Top)
(DIELECTRIC T=0.06110 C=4.80000 L=DL01)
}

and change it to

{STACKUP
(SIGNAL T=0.00070 P=0.00070 L=Top)
(DIELECTRIC T=0.06110 C=4.80000 L=DL01)
(SIGNAL T=0.00070 P=0.00070 L=Bottom)
}

Annotations class is under reconstruction, so I think that this should be fixed after that.

[Mariusz]

Ok, I know why there is no bottom layer. You exported board with blanked bottom layer. This is (in my opinion) bug in Eagle exporter. Just display missing layer before export.

[Jim Meech]

Hi,
Thanks for figuring out what I did wrong, sorry I thought it was a bug. Your help is much appreciated.
Best regards
jim