#41 holes (vias) are not cleared by soldermask when export to gEDA

[Jiří Čejka]

Hi,

there is problem with soldermask clearance when newly created PCB is exported
from FreeCAD to gEDA. Please see the attached files for reference. I did as
follows:

1) Create and export PCB from FreeCAD to gEDA (filenames starting with 1)
2) Open that file using gEDA and make a screenshot
3) Copy that PCB file twice and mark the new copies as 2_... and 3_...
4) Open copy 2_... and on every hole press twice CTRL+H (gEDA shortcut to switch
between plated hole (via) and unplated hole (hole) to bring plated holes back
(vias) as is has been originally exported by FreeCAD-PCB, make screenshot and
save
5) Open copy 3_... and on every hole press once CTRL+H to make unplated hole
(hole) as should be exported by FreeCAD-PCB, make screenshot and save

Please note differences between 1 and 2 and 3 screenshots which shows that
plated holes (vias) in 1 are not cleared by soldermask. If you look into 1 and 2
PCB sources to VIA commnads you'll see some differences.

The 3 is only for reference how it should look like originally after export.
Difference between VIA and VIA+HOLE flag was explained in one of my previous bug
report.

[Mariusz]

Hello,
fixed.