The package m68k-bdm-1.4-pre4.zip for 68360 CPU32+ (/dev/bdmcpu320) does not work.
Driver file bdm-cpu32 has ommisions and failures: a) ..pd_init does not completely initialize the BDM structure, I added/copied parts of the ..icd_init b) the error reported in 2008 is still there in write_sysreg cmd = BDM_WSREG_CMD must be cmd |= BDM_WSREG_CMD
On the gdbserver side the CPU32+ is not supported
See file m68k-bdm-low.c CPU-type and CPU-family are the confusion variables I made a hardcoded solution to get it work and use where appropriate M68K_BDM_MARCH_CPU32PLUS to refer tp CPU32+
* m68k_bdm_store_register calls for two successive register update (64bit value?)
I excluded one call
See file regcach.c
function:registers_from_string (). NON-CACHEABLE is a condition for writing; hence hardly registers are written because most are cacheable. NON-CACHEABLE is - to my opinion not relevant in writing; I removed it. It is maintained in reading because NON_CACHEABLE actually means volatile.
A minor error between regcach.c: registers_from_string, registers to string and m68k-bdm-low.c:m68k_bdm_store_registers what is the valid range for regno; the value regno=0 has two meanings; it works as it is but not guaranteed.
In m68k-cpu32plus.xml, I change the line 23 "mbat" changed into "mbar" just to be sure that (gdb) set $mbar goes to the right register
With above adaptations (hard coded) I can work with the package and 68360 CPU32+
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The package m68k-bdm-1.4-pre4.zip for 68360 CPU32+ (/dev/bdmcpu320) does not work.
Driver file bdm-cpu32 has ommisions and failures:
a) ..pd_init does not completely initialize the BDM structure, I added/copied parts of the ..icd_init
b) the error reported in 2008 is still there in write_sysreg cmd = BDM_WSREG_CMD must be cmd |= BDM_WSREG_CMD
On the gdbserver side the CPU32+ is not supported
See file m68k-bdm-low.c
CPU-type and CPU-family are the confusion variables
I made a hardcoded solution to get it work and use where appropriate M68K_BDM_MARCH_CPU32PLUS to refer tp CPU32+
* m68k_bdm_store_register calls for two successive register update (64bit value?)
I excluded one call
See file regcach.c
function:registers_from_string (). NON-CACHEABLE is a condition for writing; hence hardly registers are written because most are cacheable. NON-CACHEABLE is - to my opinion not relevant in writing; I removed it. It is maintained in reading because NON_CACHEABLE actually means volatile.
A minor error between regcach.c: registers_from_string, registers to string and m68k-bdm-low.c:m68k_bdm_store_registers what is the valid range for regno; the value regno=0 has two meanings; it works as it is but not guaranteed.
In m68k-cpu32plus.xml, I change the line 23 "mbat" changed into "mbar" just to be sure that (gdb) set $mbar goes to the right register
With above adaptations (hard coded) I can work with the package and 68360 CPU32+